The present invention relates to testing a packet data signal transceiver device under test (DUT), and in particular, to controlling test flow when testing such a DUT by inducing an interrupt.
Many of today's electronic devices use wireless technologies for both connectivity and communications purposes. Because wireless devices transmit and receive electromagnetic energy, and because two or more wireless devices have the potential of interfering with the operations of one another by virtue of their signal frequencies and power spectral densities, these devices and their wireless technologies must adhere to various wireless technology standard specifications.
When designing such wireless devices, engineers take extra care to ensure that such devices will meet or exceed each of their included wireless technology prescribed standard-based specifications. Furthermore, when these devices are later being manufactured in quantity, they are tested to ensure that manufacturing defects will not cause improper operation, including their adherence to the included wireless technology standard-based specifications.
For testing these devices following their manufacture and assembly, current wireless device test systems employ a subsystem for analyzing signals received from each device. Such subsystems typically include at least a vector signal generator (VSG) for providing the source signals to be transmitted to the device under test, and a vector signal analyzer (VSA) for analyzing signals produced by the device under test. The production of test signals by the VSG and signal analysis performed by the VSA are generally programmable so as to allow each to be used for testing a variety of devices for adherence to a variety of wireless technology standards with differing frequency ranges, bandwidths and signal modulation characteristics.
As is well known in the art, the time required to test a device has a linear relationship with the cost associated with conducting the test. Therefore, it is advantageous to reduce the amount of time required by a test, thereby increasing the throughput of each test system and lowering overall production costs. Several factors contribute to the total time required to test a device. These factors include the time spent handling a device, setting up the test, sending control signals from the tester to the device, capturing signals sent by the device, and analyzing those captured signals. Time spent handling and sending control signals to the device can require a proportionately large amount of the overall test time. Furthermore, these control signals are not directly involved in capturing, measuring or evaluating signals from the device. Accordingly, this is a promising area for innovation.